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 FCBS0650 Smart Power Module (SPM)
September 8, 2005
FCBS0650
Smart Power Module (SPM) Features
* UL Certified No.E209204(SPM27-BA package) * 500V-6A 3-phase MOSFET inverter bridge including control ICs for gate driving and protection * Divided negative dc-link terminals for inverter current sensing applications * Single-grounded power supply due to built-in HVIC * Isolation rating of 2500Vrms/min. * Very low leakage current due to using ceramic substrate
General Description
It is an advanced smart power module (SPM) that Fairchild has newly developed and designed to provide very compact and high performance ac motor drives mainly targeting low-power inverter-driven application like refrigerator. It combines optimized circuit protection and drive matched to low-loss MOSFETs. System reliability is further enhanced by the integrated under-voltage lock-out and short-circuit protection. The high speed built-in HVIC provides opto-coupler-less single-supply MOSFET gate driving capability that further reduce the overall size of the inverter system design. Each phase current of inverter can be monitored separately due to the divided negative dc terminals.
Applications
* AC 200V three-phase inverter drive for small power ac motor drives * Home appliances applications like refrigerator.
Top View
Bottom View
44mm
26.8mm
Figure 1.
(c)2005 Fairchild Semiconductor Corporation
1
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FCBS0650 Rev. A
FCBS0650 Smart Power Module (SPM)
Integrated Power Functions
* 500V-6A MOSFET inverter for three-phase DC/AC power conversion (Please refer to Fig. 3)
Integrated Drive, Protection and System Control Functions
* For inverter high-side MOSFETs: Gate drive circuit, High voltage isolated high-speed level shifting Control circuit under-voltage (UV) protection Note) Available bootstrap circuit example is given in Figs. 10 and 11. * For inverter low-side MOSFETs: Gate drive circuit, Short circuit protection (SC) Control supply circuit under-voltage (UV) protection * Fault signaling: Corresponding to a UV fault (Low-side supply), SC fault * Input interface: 3.3/5V CMOS/LSTTL compatible, Schmitt trigger input
Pin Configuration Top View
13.3
(1) (2) (3) (4) (5) (6) (7) (8) V CC(L) COM IN (UL) IN (VL) IN (WL) V FO CFOD CSC
(21) N U (22) N V
19.1
(23) N W
(9) IN (UH) (10) V CC(UH) (11) V B(U) (12) V S(U) (13) IN (VH) (14) VCC(VH) (15) V B(V) (16) V S(V) (17) IN (WH) (18) VCC(WH) (19) V B(W) (20) V S(W)
Figure 2.
(24) U
Case Tem perature (T ) C Detecting Point
(25) V
(26) W Ceramic Substrate (27) P
2 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
Pin Descriptions
Pin Number
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
Pin Name
VCC(L) COM IN(UL) IN(VL) IN(WL) VFO CFOD CSC IN(UH) VCC(UH) VB(U) VS(U) IN(VH) VCC(VH) VB(V) VS(V) IN(WH) VCC(WH) VB(W) VS(W) NU NV NW U V W P
Pin Description
Low-side Common Bias Voltage for IC and MOSFETs Driving Common Supply Ground Signal Input for Low-side U Phase Signal Input for Low-side V Phase Signal Input for Low-side W Phase Fault Output Capacitor for Fault Output Duration Time Selection Capacitor (Low-pass Filter) for Short-Current Detection Input Signal Input for High-side U Phase High-side Bias Voltage for U Phase IC High-side Bias Voltage for U Phase MOSFET Driving High-side Bias Voltage Ground for U Phase MOSFET Driving Signal Input for High-side V Phase High-side Bias Voltage for V Phase IC High-side Bias Voltage for V Phase MOSFET Driving High-side Bias Voltage Ground for V Phase MOSFET Driving Signal Input for High-side W Phase High-side Bias Voltage for W Phase IC High-side Bias Voltage for W Phase MOSFET Driving High-side Bias Voltage Ground for W Phase MOSFET Driving Negative DC-Link Input for U Phase Negative DC-Link Input for V Phase Negative DC-Link Input for W Phase Output for U Phase Output for V Phase Output for W Phase Positive DC-Link Input
3 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
Internal Equivalent Circuit and Input/Output Pins
P (27)
(19) VB(W) (18) VCC(WH)
VB VCC COM IN OUT VS
W (26)
(17) IN(WH) (20) VS(W) (15) VB(V) (14) VCC(VH)
VB VCC COM IN OUT VS
V (25)
(13) IN(VH) (16) VS(V) (11) VB(U) (10) VCC(UH) (9) IN(UH) (12) VS(U)
VB VCC COM IN OUT VS
U (24)
(8) CSC (7) CFOD (6) VFO
C(SC) OUT(WL) C(FOD) VFO IN(WL) OUT(VL) IN(VL) IN(UL) COM OUT(UL) VSL
NU (21) NV (22) NW (23)
(5) IN(WL) (4) IN(VL) (3) IN(UL) (2) COM (1) VCC(L)
VCC
Note: 1. Inverter low-side is composed of three MOSFETs, and one control IC. It has gate driving and protection functions. 2. Inverter power side is composed of four inverter dc-link input terminals and three inverter output terminals. 3. Inverter high-side is composed of three MOSFETs and three drive ICs for each MOSFET.
Figure 3.
4 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
Absolute Maximum Ratings (TJ = 25C,
Inverter Part Symbol
VPN VPN(Surge) VDSS ID IDP PC TJ
Note:
Unless Otherwise Specified)
Parameter
Supply Voltage Supply Voltage (Surge) Drain-Source Voltage Each MOSFET Drain Current Each MOSFET Drain Current (Peak) Collector Dissipation Operating Junction Temperature
Conditions
Applied between P- NU, NV, NW Applied between P- NU, NV, NW TC = 25C, Peak Sinusoidal Current TC = 25C, Under 1ms Pulse Width TC = 25C per One Chip (Note 1)
Rating
400 450 500 6 8 26.3 -20 ~ 125
Units
V V V A A W C
1. The maximum junction temperature rating of the power chips integrated within the SPM is 150 C(@TC 100C). However, to insure safe operation of the SPM, the average junction temperature should be limited to TJ(ave) 125C (@TC 100C)
Control Part Symbol
VCC VBS VIN VFO IFO VSC
Parameter
Control Supply Voltage
Conditions
Applied between VCC(UH), VCC(VH), VCC(WH), VCC(L) COM
Rating
20 20 -0.3~17 -0.3~VCC+0.3 5 -0.3~VCC+0.3
Units
V V V V mA V
High-side Control Bias Volt- Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) age VS(W) Input Signal Voltage Fault Output Supply Voltage Fault Output Current Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL), IN(WL) - COM Applied between VFO - COM Sink Current at VFO Pin
Current Sensing Input Voltage Applied between CSC - COM
Total System Symbol
TSC TC TSTG VISO
Parameter
Short sircuit withstanding time Module Case Operation Temperature Storage Temperature Isolation Voltage
Conditions
VCC = VBS = 13.5 ~ 16.5V, TJ = 125C,Nonrepetitive,VPN=400V, RShunt=0m -20C TJ 125C, See Figure 2 60Hz, Sinusoidal, AC 1 minute, Connection Pins to ceramic substrate
Rating
10 -20 ~ 100 -40 ~ 125 2500
Units
s C C Vrms
Thermal Resistance
Symbol
Rth(j-c)
Note: 2. For the measurement point of case temperature(TC), please refer to Figure 2.
Parameter
Conditions
Min. Typ. Max.
3.8
Units
C/W
Junction to Case Thermal Inverter MOSFET part (per 1/6 module) Resistance
Package Marking and Ordering Information
Device Marking
FCBS0650
Device
FCBS0650
Package
SPM27BA
Reel Size
-
Tape Width
-
Quantity
10
5 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
Electrical Characteristics (TJ = 25C, Unless Otherwise Specified)
Inverter Part Symbol
RDS(ON) VSD HS tON tC(ON) tOFF tC(OFF) trr LS tON tC(ON) tOFF tC(OFF) trr IDSS
Note: 3. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For the detailed information, please see Figure 4.
Parameter
Static Drain-Source Resistance
Conditions
On VCC = VBS = 15V VIN = 5V ID =3A, TJ = 25C ID =3A, TJ = 25C
Min.
-
Typ.
1.15 0.52 0.19 0.77 0.08 0.13 0.68 0.25 0.80 0.07 0.15 -
Max.
1.55 1.25 250
Units
Drain-Source Diode For- VCC = VBS = 15V ward Voltage VIN = 0V Switching Times
V s s s s s s s s s s A
VPN = 300V, VCC = VBS = 15V ID = 3A VIN = 0V 5V, Inductive Load (Note 3)
VPN = 300V, VCC = VBS = 15V ID = 3A VIN = 0V 5V, Inductive Load (Note 3)
-
Drain - Source Leakage Current
VDS = VDSS
-
Irr
100% of ID 100% of ID
VDS
90% of ID 10% of VDS
ID
10% of ID
ID VIN
10% of ID
VDS VIN
10% of VDS
tON
trr tC(ON) tOFF
tC(OFF)
(a) Turn-on
Figure 4. Switching Time Definition
(b) Turn-off
6 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
Electrical Characteristics (TJ = 25C, Unless Otherwise Specified)
Control Part Symbol
IQCCL IQCCH IQBS VFOH VFOL VSC(ref) UVCCD UVCCR UVBSD UVBSR tFOD VIN(ON) VIN(OFF)
Note: 4. Short-circuit current protection is functioning only at the low-sides. 5. The fault-out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation : CFOD = 18.3 x 10-6 x tFOD[F]
Parameter
Quiescent VCC Supply Current
Conditions
VCC = 15V IN(UL, VL, WL) = 0V VCC = 15V IN(UH, VH, WH) = 0V VCC(L) - COM VCC(UH), VCC(VH), VCC(WH) - COM VB(U) - VS(U), VB(V) -VS(V), VB(W) - VS(W)
Min.
4.5 0.45 10.7 11.2 10.1 10.5 1.0 2.9 -
Typ.
0.5 11.9 12.4 11.3 11.7 1.8 -
Max.
23 100 500 0.8 0.55 13.0 13.2 12.5 12.9 0.8
Units
mA A A V V V V V V V ms V V
Quiescent VBS Supply Current Fault Output Voltage
VBS = 15V IN(UH, VH, WH) = 0V
VSC = 0V, VFO Circuit: 4.7k to 5V Pull-up VSC = 1V, VFO Circuit: 4.7k to 5V Pull-up VCC = 15V (Note 4) Detection Level Reset Level Detection Level Reset Level
Short Circuit Trip Level Supply Circuit UnderVoltage Protection
Fault-out Pulse Width ON Threshold Voltage OFF Threshold Voltage
CFOD = 33nF (Note 5) Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL), IN(WL) - COM
Recommended Operating Conditions
Symbol
VPN VCC VBS dVCC/dt, dVBS/dt tdead fPWM VSEN
Parameter
Supply Voltage Control Supply Voltage High-side Bias Voltage Control supply variation
Conditions
Applied between P - NU, NV, NW Applied between VCC(UH), VCC(VH), VCC(WH), VCC(L) - COM Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W)
Value Min.
13.5 13.0 -1 2 -4
Typ.
300 15 15 -
Max.
400 16.5 18.5 1 20 4
Units
V V V V/s s kHz V
Blanking Time for Preventing For Each Input Signal Arm-short PWM Input Signal Voltage for Current Sensing -20C TC 100C, -20C TJ 125C Applied between NU, NV, NW - COM (Including surge voltage)
7 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
Mechanical Characteristics and Ratings
Parameter
Mounting Torque Device Flatness Weight Mounting Screw: - M3
Conditions
Recommended 0.62N*m Note Fig. 5
Limits Min.
0.51 0 -
Typ.
0.62 15.4
Max.
0.72 +120 -
Units
N*m m g
(+)
(+)
Figure 5. Flatness Measurement Position
8 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
Time Charts of SPMs Protective Function
Low-Side Input Signal Protection Circuit State
UVCCR
RESET
SET
RESET
Low-Side Control Supply Voltage
a1 UVCCD a2 a4 a3
a6
a7
Low-Side Output Current Fault Output Signal
a5
a1 : Control supply voltage rises: After the voltage rises UVCCR, the circuits start to operate when next input is applied. a2 : Normal operation: MOSFET ON and carrying current. a3 : Under voltage detection (UVCCD). a4 : MOSFET OFF in spite of control input condition. a5 : Fault output operation starts. a6 : Under voltage reset (UVCCR). a7 : Normal operation: MOSFET ON and carrying current.
Figure 6. Under-Voltage Protection (Low-side)
High-Side Input Signal Protection Circuit State
UVBSR
RESET
SET
RESET
High-Side Control Supply Voltage
b1 UVBSD b2 b3
b5 b6 b4
High-Side Output Current Fault Output Signal
High-level (no fault output)
b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied. b2 : Normal operation: MOSFET ON and carrying current. b3 : Under voltage detection (UVBSD). b4 : MOSFET OFF in spite of control input condition, but there is no fault output signal. b5 : Under voltage reset (UVBSR) b6 : Normal operation: MOSFET ON and carrying current
Figure 7. Under-Voltage Protection (High-side)
9 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
Low-Side input Signal Protection circuit state Low-Side Internal IGBT Gate-Emitter Voltage
c6
c7
SET
c4 c3 c2
RESET
SC
c1
Low-Side Output Current
c8
Sensing Voltage of the shunt resistance Fault Output Signal
SC Reference Voltage
c5
CR circuit time constant delay
(with the external shunt resistance and CR connection) c1 : Normal operation: MOSFET ON and carrying current. c2 : Short circuit current detection (SC trigger). c3 : Hard MOSFET gate interrupt. c4 : MOSFET turns OFF. c5 : Fault output timer operation starts: The pulse width of the fault output signal is set by the external capacitor CFO. c6 : Input "L" : MOSFET OFF state. c7 : Input "H": MOSFET ON state, but during the active period of fault output the MOSFET doesn't turn ON. c8 : MOSFET OFF state
Figure 8. Short-Circuit Current Protection (Low-side Operation only)
10 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
5V-Line
R PF = 4.7k
SPM
IN (UH) , IN (VH) , IN(W H)
CPU
100 C PF = 1nF 1nF
IN (UL) IN (VL) VFO
IN (W L)
CO M
Note: 1. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application's printed circuit board. The SPM input signal section integrates 3.3k (typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal. 2. The logic input is compatible with standard CMOS or LSTTL outputs.
Figure 9. Recommended CPU I/O Interface Circuit
These Values depend on PWM Control Algorithm
15V-Line
RE(H)
RBS
DBS
One-Leg Diagram of SPM
P 22uF 0.1uF
Inverter Output 1000uF 1uF N
Note: 1. It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics. 2. The bootstrap resistor (RBS) should be 3 times greater than RE(H). The recommended value of RE(H) is 5.6, but it can be increased up to 20 (maximum) for a slower dv/dt of high-side. 3. The ceramic capacitor placed between VCC-COM should be over 1uF and mounted as close to the pins of the SPM as possible.
Fig. 10. Recommended Bootstrap Operation Circuit and Parameters
11 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
R E(W H)
R E(VH) 15V line R E(UH) R BS D BS
P (27)
(19) V B(W ) (18) V CC(W H)
VB VCC COM IN OUT VS
W (26)
Gating W H R BS
C BS
C BSC
(17) IN (W H) (20) V S(W )
D BS
(15) V B(V) (14) V CC(VH)
VB VCC COM IN OUT VS
V (25)
Gating VH R BS D BS
(13) IN (VH) (16) V S(V) (11) V B(U) (10) V CC(UH)
VB VCC COM IN OUT VS
U (24)
C DCS
Vdc
Gating UH RF 5V line
C BS
C BSC
(9) IN (UH) (12) V S(U)
C SC RS Fault R PF C FOD
(8) C SC (7) C FOD (6) V FO
C(SC) C(FOD) VFO
OUT(W L)
N W (23)
R SW
Gating W L Gating VL Gating UL C BPF C PF
(5) IN (W L) (4) IN (VL) (3) IN (UL) (2) COM
IN(W L) OUT(VL) IN(VL) IN(UL) COM OUT(UL) V SL
N U (21) N V (22)
R SV
(1) V CC(L)
VCC
R SU
W-Phase Current V-Phase Current U-Phase Current
C FW C FV C FU
R FW R FV R FU
Note: 1. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2-3cm) 2. By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is possible. 3. VFO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7k resistance. Please refer to Figure 9. 4. CSP15 of around 7 times larger than bootstrap capacitor CBS is recommended. 5. VFO output pulse width should be determined by connecting an external capacitor(CFOD) between CFOD(pin7) and COM(pin2). (Example : if CFOD = 33 nF, then tFO = 1.8ms (typ.)) Please refer to the note 5 for calculation method. 6. Input signal is High-Active type. There is a 3.3k resistor inside the IC to pull down each input signal line to GND. When employing RC coupling circuits, set up such RC couple that input signal agree with turn-off/turn-on threshold voltage. 7. To prevent errors of the protection function, the wiring around RF and CSC should be as short as possible. 8. In the short-circuit protection circuit, please select the RFCSC time constant in the range 1.5~2 s. 9. Each capacitor should be mounted as close to the pins of the SPM as possible. 10. To prevent surge destruction, the wiring between the smoothing capacitor and the P&COM pins should be as short as possible. The use of a high frequency non-inductive capacitor of around 0.1~0.22 F between the P&COM pins is recommended. 11. Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays. 12. CSPC15 should be over 1F and mounted as close to the pins of the SPM as possible.
Fig. 11. Typical Application Circuit
12 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
Detailed Package Outline Drawings
13 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
Detailed Package Outline Drawings (Continued)
14 FCBS0650 Rev. A
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FCBS0650 Smart Power Module (SPM)
Detailed Package Outline Drawings (Continued)
15 FCBS0650 Rev. A
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TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM FAST(R) ActiveArrayTM FASTrTM BottomlessTM FPSTM Build it NowTM FRFETTM CoolFETTM GlobalOptoisolatorTM CROSSVOLTTM GTOTM DOMETM HiSeCTM EcoSPARKTM I2CTM E2CMOSTM i-LoTM EnSignaTM ImpliedDisconnectTM FACTTM IntelliMAXTM FACT Quiet SeriesTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM
DISCLAIMER
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PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6
SuperSOTTM-8 SyncFETTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UltraFET(R) UniFETTM VCXTM WireTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I16


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